Compiler Techniques for Customisable Embedded Processors
Head of project at USI: Laura Pozzi
Starting date: 1 Ottobre 2006
Duration: 24 months
- P170 Computer science, numerical analysis, systems control
- P175 Informatics, systems theory
- Facoltà di scienze informatiche
Processor Customisation is an important technique aimed at meeting the stringent requirements of Embedded Processor design: a blend of high performance, low power, and fast time to market that is seldom found outside the embedded applications world. Customisable Processors are quickly becoming available, offering the possibility to extend a base Instruction Set with Instruction Set Extensions (ISEs), so that critical parts of the application can be run in hardware.
The automation offered by these processor toolchains is increasing, and techniques have been proposed to identify ISEs from application source code analysis. This automation trend modifies profoundly the role of a traditional compiler, which is now given the capability of choosing the underling machine and then compile onto it. Are traditional compiler techniques apt to this new role?
This project´s aim is precisely to answer this question. We will design a customisable processor complier, investigate on its new role, and design new algorithms and techniques for: ISE identification, ISE reuse among different applications, exposition of ISEs. We will also build a full compilation and simulation framework for precisely assessing results.